The present invention relates generally to integrated circuits and in particular to providing integrated circuits with optimized operating voltages.
Although the manufacture of integrated circuits is carefully controlled, inherent variations in the fabrication process cannot be avoided. These process-related variations translate into variations of functional and electrical parameters of the manufactured devices and affect the device performance. One example of a parameter that may be subject to variations during the manufacturing process is temperature. Of course, there are numerous other process parameters that may vary, as well. The resulting device parametric variations occur from lot to lot and from wafer to wafer, but also within wafers and even within dice. They can cause variations in timing performance and operating margin of the fabricated integrated circuits.
Device parametric variations due to process variations can be considerable in magnitude and therefore have a critical impact on the yield of the fabrication process. Because of this, circuit designers have to accommodate these variations when designing the circuit. Specifically, they have to design the circuit so as to meet the specification not only at optimal fabrication conditions but at process corners. However, performance requirements are difficult to achieve at the process corners. The designer thus has to weigh the goals of high performance and high yield, forcing him to make a trade-off between the two goals.